In the semiconductor industry, electrostatic chucks (ESCs) have been utilized in plasma-based or vacuum-based semiconductor processes such as etching, CVD, and ion implantation, etc. for a long time. Capabilities of the ESCs, including non-edge exclusion and wafer temperature control, have proven to be quite valuable in processing workpieces such as semiconductor substrates or wafers, (e.g., silicon wafers). A typical ESC, for example, comprises a dielectric layer positioned over a conductive electrode, wherein the semiconductor wafer is placed on a surface of the ESC (e.g., the wafer is placed on a surface of the dielectric layer). During semiconductor processing, a clamping voltage is typically applied between the wafer and the electrode, wherein the wafer is clamped against the chuck surface by electrostatic forces.
Declamping or un-sticking the wafer from the chuck surface, however, is a concern in many ESC applications. For example, Johnsen-Rahbek (J-R) effect-type ESCs have been developed in order to minimize the de-clamping problem by providing a purposely “leaky” dielectric such that the residual charges can be discharged more quickly. Wafer de-clamping problems in J-R type ESCs, however, can still be present, and are typically caused, at least in part, by charge migrating and accumulating to the backside insulator surface of the wafer. Another problem that can occur is when charge in the wafer builds up from the leakage in a J-R ESC, wherein eventually, the wafer will charge up to substantially the same charge of the ESC. In such an instance, there will be a negligible difference in charge between the ESC and the wafer, and the clamping forces on the wafer will be lost.
Thus, there is a need to provide a low resistance ground path from the wafer in order to provide proper charges in ESCs. Most semiconductor wafers, however, have some kind of oxide, nitride, or other insulative layer that prevents a simple electrical contact being touched to the backside of the wafer. Even wafers that have not yet undergone processing will typically have native oxide formed thereon. Thus, a need exists for a mechanism that is operable to penetrate through the oxide or other insulative layer on the wafer, wherein desired electrical behavior between the ESC and workpiece can be achieved.